How to Design an eGaN FET-Based Power Stage with an Optimal Layout

eGaN FETs are capable of switching much faster than Si MOSFETs, requiring more careful consideration of PCB layout design to minimize parasitic inductances. Parasitic inductances cause higher overshoot voltages and slower switching transitions. This whitepaper reviews the key steps to designing an optimal power stage layout with eGaN FETs, to avoid these unwanted effects and maximize the converter performance.

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