PCB Layout Considerations with GaN E-HEMTs
This guide provides an overview of the good engineering practice for PCB layout of designs using GaN Systems’ embedded GaNPX® packaged E-HEMTs. Good engineering practice of layout techniques are required to minimize parasitic inductance and fully utilize the benefit of GaN Systems’ E-HEMTs. This application note shows key steps to design an optimal PCB layout with GaN to maximize converter performance.
By downloading a white paper, the details of your profile might be shared with the creator of the content and you may be contacted by them directly.