What are Gate Turn Off Thyristors?

Gate turn off thyristors are four-layer, bidirectional power semiconductor devices capable of being both turned on and turned off through gate control. Unlike conventional thyristors that require external circuit conditions to commutate off, these devices allow active interruption of conduction by applying an appropriate gate signal. This capability enables controlled switching in high-power applications where precise regulation of current flow is required.

The internal structure of a gate turn off thyristor supports high voltage blocking and high current conduction while maintaining gate-controlled turn-off behavior. Device performance is governed by the interaction between the main current path and the gate structure, which extracts charge carriers during turn-off. This makes gate-related electrical parameters critical for reliable operation, switching speed, and integration into power conversion systems.

Key Specifications

• Breakover Voltage: The breakover voltage defines the maximum forward or reverse voltage the device can withstand in the blocking state before it transitions into conduction without a gate signal. This parameter determines the voltage handling capability of the thyristor in off-state conditions.
• Breakover Current: The breakover current represents the current level associated with the onset of uncontrolled conduction once the breakover voltage is exceeded. It is an indicator of the device’s stability in the blocking region and its susceptibility to unintended turn-on.
• Gate Trigger Voltage: The gate trigger voltage specifies the minimum gate-to-cathode voltage required to initiate conduction of the thyristor under defined conditions. This parameter influences gate drive circuit design and ensures reliable turn-on behavior.
• Gate Trigger Current: The gate trigger current defines the amount of gate current needed to switch the device from the blocking state into the conducting state. It reflects the sensitivity of the gate structure and affects the power requirements and robustness of the gate drive circuitry.

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