Siemens Digital releases Aprisa physical design software for low-power SoCs.The Aprisa digital design software helps designers address the many challenges of low-power designs. Aprisa is the most flexible IC place-and-route tool on the market. It accepts all industry-standard power formats, has excellent correlation to third-party signoff tools, and is easy to install, set up, and use. With effective technology and impressive usability, the Aprisa software ensures cost-effective tape-outs for low-power or power-sensitive designs.

Low power challenges in place-and-route

Power, performance, and area (PPA) is a phrase in the IC design community all commonly uses when describing the three key areas to focus on in optimizing an IC design. Traditionally, performance has been the primary focus, but as designs have moved to smaller, more advanced process nodes, and switching activity has become a dominant component in power consumption, power is often the dominant focus in PPA.

The challenges of achieving low-power during place-and-route relate to how well the place-and-route software handles multiple power domains and the kinds of optimizations the software performs throughout the flow to achieve low power goals.

The Aprisa place-and-route tool low-power solution

The place-and-route software used in the digital implementation flow must be able to buffer on multiple power domains without errors and perform placement of all power management cells such as level shifters, isolation cells, power switch cells, and retention flip-flops. Power-sensitive designs also require routing secondary power/ground pins and routing to the power grid inside the voltage islands. The Siemens Aprisa place-and-route software exhibits low-power capabilities which include PowerFirst implementation technology that reduces total power consumption and its support of multi-power domain methodology.

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