Applied Materials Inc has announced new products for Silicon carbide (SiC) chipmakers to transition from 150 mm wafer production to 200 mm production, which approximately doubles die output per wafer, to help satisfy the growing demand for premium electric vehicle powertrains.
SiC power semiconductors are in high demand because they help efficiently convert battery power to torque, thereby increasing vehicle performance and range. Compared to Silicon, SiC is inherently harder with natural defects that can lead to degradation of electrical performance, power efficiency, reliability and yield. Advanced materials engineering is needed to optimize raw wafers for production and build circuits with minimum damage to the crystal lattice.
“To fuel the computer revolution, chipmakers moved to ever-larger wafer sizes, dramatically increasing chip output to satisfy burgeoning global demand,” said Sundar Ramamurthy, Group Vice President and General Manager of the ICAPS group at Applied Materials. “Today we are in the early stages of another revolution that will benefit from Applied’s expertise in materials engineering at an industrial scale.”
“Electrification of the transportation industry is a rising trend, and we are accelerating this inflection point by leading the global transition from silicon to silicon carbide with our Wolfspeed technology,” said Gregg Lowe, President and CEO of Cree Inc. “Delivering the highest-performing Silicon carbide power devices on larger 200 mm wafers enables us to increase end-customer value and meet growing demand.”
“Applied’s support in helping speed qualification of 200 mm processes in Albany and multi-equipment installations at our Mohawk Valley Fab is expediting this transition,” Lowe added. “Moreover, new technologies being developed by Applied’s ICAPS team, such as hot implant, have broadened and deepened our technical collaboration and helped accelerate our power technology roadmap.”
New 200 mm SiC CMP System
SiC wafer surface quality is critically important to SiC device fabrication as any defects on the surface of the wafer will migrate through the subsequent layers. To produce uniform wafers with the highest quality surfaces, Applied has developed the Mirra Durum CMP (chemical mechanical planarization) system which integrates polishing, measurement of material removal, cleaning and drying in a single system. The new system has demonstrated a 50X reduction in finished wafer surface roughness as compared to mechanically grinded SiC wafers and a 3X reduction in roughness compared to batch CMP processing systems.
Hot Implant Increases SiC Chip Performance and Power Efficiency
During SiC chip fabrication, ion implantation places dopants within the material to help enable and direct the flow of current within the high power producing circuits. The density and hardness of SiC material makes it extremely challenging to inject, accurately place and activate the dopants while minimizing damage to the crystal lattice which reduces performance and power efficiency. Applied has solved this challenge with its new VIISta 900 3D hot ion implant system for 150 mm and 200 mm SiC wafers. The hot implant technology injects ions with minimal damage to the lattice structure, resulting in a more than 40X reduction in resistivity compared to implant at room temperature.
Applied’s ICAPS (IoT, Communications, Automotive, Power and Sensors) business is developing additional products for the SiC power chip market including in PVD (physical vapor deposition), CVD (chemical vapor deposition), etch and process control.
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